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SC120
Low Voltage Synchronous Boost Converter
POWER MANAGEMENT Features
Input voltage -- 0.7V to 3.8V Minimum start-up voltage -- 0.85V Output voltage -- fixed at 3.3V; adjustable from 1.8V to 4.0V Peak input current limit -- 1.2A typically Output current at 3.3 VOUT -- 100mA with VIN = 1.0V, 150mA with VIN = 1.5V Efficiency up to 94% Internal synchronous rectifier Switching frequency -- 1.2MHz Automatic power save Anti-ringing circuit Operating supply current (measured at OUT) -- 50A Shutdown current -- 0.1A (typ) No forward conduction path during shutdown Available in ultra-thin 1.5 x 2.0 x 0.6 (mm) MLPD-6 package Fully WEEE and RoHS compliant
Description
The SC120 is a high efficiency, low noise, synchronous step-up DC-DC converter that provides boosted voltage levels in low-voltage handheld applications. The wide input voltage range allows use in systems with single NiMH or alkaline battery cells as well as in systems with higher voltage battery supplies. It features an internal 1.2A switch and synchronous rectifier to achieve up to 94% efficiency and to eliminate the need for an external Schottky diode. The output voltage can be set to 3.3V with internal feedback, or to any voltage within the specified range using a standard resistor divider. The SC120 operates in Pulse Width Modulation (PWM) mode for moderate to high loads and Power Save Mode (PSAVE) for improved efficiency under light load conditions. It features anti-ringing circuitry for reduced EMI in noise sensitive applications. Output disconnect capability is included to reduce leakage current, improve efficiency, and eliminate external components sometimes needed to disconnect the load from the supply during shutdown. Low quiescent current is maintained with a high 1.2MHz operating frequency. Small external components and the space saving MLPD-6, 1.5x2.0x0.6mm package make this device an excellent choice for small handheld applications that require the longest possible battery life.
Applications
MP3 players Smart Phones and cellular phones Palmtop computers and handheld Instruments PCMCIA cards Memory cards Digital cordless phones Personal medical products Wireless VoIP phones Small motors
Typical Application Circuit
L1
Single Cell (1.2V) CIN
CO NF ID EN TI AL
IN EN GND LX OUT FB COUT
3.3V
SC120
August 6, 2009
PRELIMINARY
1
SC120
Pin Configuration Ordering Information
Device
SC120ULTRT(1)(2) SC120EVB
Package
MLPD-UT-6 1.5x2 Evaluation Board
LX GND IN
1
TOP VIEW
6
OUT FB EN
Notes: (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Lead-free package only. Device is WEEE and RoHS compliant.
2
5
3
T
4
120 yw
y = year of manufacture w = week of manufacture
CO N
PRELIMINARY
FI
Marking Information
DE
NT
IA
MLPD-UT; 1.5x2, 6 LEAD JA = 84C/W
L
2
SC120
Absolute Maximum Ratings
IN, OUT, LX, FB (V) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 EN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3) ESD Protection Level (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
(1)
Recommended Operating Conditions
Ambient Temperature Range (C) . . . . . . . . . . . . -40 to +85 VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7 to 3.8 VOUT (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 to 4.0
Thermal Information
Thermal Resistance, Junction to Ambient(2) (C/W) . . . . 84 Maximum Junction Temperature (C) . . . . . . . . . . . . . . . 150 Storage Temperature Range (C) . . . . . . . . . . . -65 to +150 Peak IR Reflow Temperature (10s to 30s) (C) . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to JEDEC standard JESD22-A114. (2) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Unless otherwise noted VIN = 2.5V, CIN = COUT = 22F, L1 = 4.7H, TA = -40 to +85C. Typical values are at TA = 25C.
Parameter
Input Voltage Range Minimum Startup Voltage Shutdown Current Operating Supply Current(1)
Symbol
VIN VIN-SU ISHDN IQ
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Electrical Characteristics
Conditions
NT
IA
L
Min
0.7
Typ
Max
3.8 0.85
Units
V V A A MHz %
CO N
FI
IOUT < 1mA, TA = 0C to 85C TA = 25C, VEN = 0V 0.1 50 1.2 90
1
In PSAVE mode, non-switching, measured at OUT
Internal Oscillator Frequency Maximum Duty Cycle Minimum Duty Cycle Output Voltage
fOSC
DCMAX DCMIN VOUT VOUT_RNG VINT_FB VFB IFB tSU RDSP VOUT = 3.3V VFB = 1.2V VFB = 0V VOUT > VIN + 0.3V VFB = 0V, (VOUT set to 3.3V) 1.8 -3 1.182
15 3.3 4.0 3 1.200 1.218 0.1 1 0.6
% V V % V A ms
Adjustable Output Voltage Range Internal Feedback Reference Accuracy FB Pin Regulation Voltage FB Pin Input Current Startup Time P-Channel ON Resistance
PRELIMINARY
3
SC120
Electrical Characteristics (continued)
Parameter
N-Channel ON Resistance N-Channel Current Limit P-Channel Startup Current Limit LX Leakage Current PMOS LX Leakage Current NMOS Logic Input High Logic Input Low Logic Input Current High Logic Input Current Low
Symbol
RDSN ILIM(N) ILIM(P)-SU ILXP ILXN VIH VIL IIH IIL
Conditions
VOUT = 3.3V VIN = 3.0V VIN > VOUT, VEN > VIH TA = 25C, VLX = 0V TA = 25C, VLX = 3.3V VIN = 3.0V VIN = 3.0V VEN = VIN = 3.0V VEN = 0V
Min
Typ
0.5
Max
Units
A mA
0.9
1.2 150 1 1
A A V
0.85 0.2
V A A
L
-0.2
NOTES: (1) Quiescent operating current is drawn from OUT while in regulation. The quiescent operating current projected to IN is approximately IQ x (VOUT/VIN).
CO N
FI
DE
PRELIMINARY
NT
IA
1
4
SC120
Typical Characteristics
Efficiency vs. IOUT (VOUT = 1.8V)
100 90 80 70 R1 = 499k, R2 = 1M, L = 4.7H, TA = 25 C
100
OUT OUT R1 = 499k, R2 = 1M, L = 4.7H, VIN = 1.1V
Efficiency vs. I
(V
= 1.8V)
VIN = 1.5V
90 80 70
TA = -40C
Efficiency (%)
60
VIN = 0.7V
50 40 30 20 10 0 0.1 0.2 0.5 1 2 5 10 20 50
VIN = 1.1V
Efficiency (%)
60 50 40 30 20 10
TA = 85C
TA = 25C
100
200
500
0.1
0.2
0.5
L
1 2 1 2 1 2 5
0
5
10
20
50
100
200
500
Efficiency vs. IOUT (VOUT = 3.3V)
100 90 80 70 FB grounded, L = 4.7H, TA = 25 C
VIN = 3.0V
NT
100 90 80 70 60 50 40 30 20 10 200 500 0 0.1 0.2
FB grounded, L = 4.7H, VIN = 1.5V
IA
0.5 0.2 0.5
IOUT (mA)
IOUT (mA)
Efficiency vs. IOUT (VOUT = 3.3V)
TA = -40C
VIN = 1.0V VIN = 2.0V
Efficiency (%)
Efficiency (%)
DE
60 50 40 30 20 10 0 0.1 0.2 0.5 1 2
TA = 85C
FI CO N
TA = 25C
5
10
20
50
100
5
10
20
50
100
200
500
IOUT (mA)
IOUT (mA)
100 90 80 70
OUT OUT R1 = 1.37M, R2 = 590k, L = 4.7H, TA = 25 C
Efficiency vs. I
(V
= 4.0V)
VIN = 3.0V
100 90 80
OUT OUT R1 = 1.37M, R2 = 590k, L = 4.7H, VIN = 2.4V
Efficiency vs. I
(V
= 4.0V)
TA = -40C
Efficiency (%)
Efficiency (%)
VIN = 1.0V VIN = 2.0V
70 60 50 40 30 20 10
TA = 25C
60 50 40 30 20 10 0 0.1 0.2 0.5 1 2 5 10 20
TA = 85C
50
100
200
500
0
0.1
10
20
50
100
200
500
IOUT (mA)
IOUT (mA)
PRELIMINARY
5
SC120
Typical Characteristics (continued)
Load Regulation (VOUT = 1.8V)
1.85 1.84 1.83 1.82 R1 = 499k, R2 = 1M, L = 4.7H, TA = 25 C 1.85 1.84 1.83 1.82
Load Regulation (VOUT = 1.8V)
R1 = 499k, R2 = 1M, L = 4.7H, VIN = 1.1V
VOUT (V)
1.81 1.8 1.79 1.78 1.77 0
VOUT (V)
1.81 1.8
TA = -40C TA = 25C
VIN = 0.7V
VIN = 1.1V
VIN = 1.5V
1.79 1.78 1.77 0
TA = 85C
50
100
150
200
250
300
350
400
450
500
50
100
L
150 200 150 200
250
300
350
400
450
500
Load Regulation (VOUT = 3.3V)
3.34 3.32 FB grounded, L = 4.7H, TA = 25 C
VIN = 3.0V
3.3
VOUT (V)
VIN = 2.0V
3.26 3.24 3.22 3.2 0
VOUT (V)
3.28
FI CO N
150 200 250 300 350 400 450 500
VIN = 1.0V
DE
NT
3.34 3.32 3.3
FB grounded, L = 4.7H, VIN = 1.5V
3.28 3.26 3.24 TA = -40C
IA
TA = 85C
50 100
IOUT (mA)
IOUT (mA)
Load Regulation (VOUT = 3.3V)
TA = 25C
3.22
TA = 85C
3.2 0 250 300 350 400 450 500
50
100
IOUT (mA)
IOUT (mA)
4.05
OUT R1 = 1.37M, R2 = 590k, L = 4.7H, TA = 25 C
Load Regulation vs. (V
= 4.0V)
4.05
OUT R1 = 1.37M, R2 = 590k, L = 4.7H, VIN = 2.4V
Load Regulation (V
= 4.0V)
TA = 85C
4 4
TA = 25C
VOUT (V)
3.95
VOUT (V)
VIN = 3.0V
3.95
TA = -40C TA = -40C
3.9
VIN = 1.0V VIN = 2.0V
3.9
TA = 25C TA = 85C
3.85 0
3.85 0
50
100
150
200
250
300
350
400
450
500
50
100
150
200
250
300
350
400
450
500
IOUT (mA)
IOUT (mA)
PRELIMINARY
6
SC120
Typical Characteristics (continued)
Line Regulation -- PSAVE Mode (VOUT = 1.8V)
1.85 1.84 1.83 R1 = 499k, R2 = 1M, L = 4.7H, IOUT = 4mA 1.85 1.84 1.83
Line Regulation -- PWM Mode (VOUT = 1.8V)
R1 = 499k, R2 = 1M, L = 4.7H, IOUT = 45mA
TA = -40C
1.82
TA = 25C
TA = 85C
1.82
VOUT (V)
VOUT (V)
1.81 1.8 1.79 1.78 1.77 0.7
1.81 1.8
TA = -40C
TA = 85C
1.79
TA = 25C
1.78
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
0.8
L
0.9 1
1.77 0.7
1.1
1.2
1.3
1.4
1.5
Line Regulation -- PSAVE Mode (VOUT = 3.3V)
3.34 3.32 3.3 FB grounded, L = 4.7H, IOUT = 4mA 3.34 3.32 3.3
TA = 85C
VOUT (V)
VOUT (V)
3.28
DE FI
2.5 2.75 3
TA = -40C
TA = 25C
3.26 3.24 3.22 3.2 0.5
NT
3.28 3.26
FB grounded, L = 4.7H, IOUT = 75mA
3.24 3.22 3.2 0.5
0.75
1
1.25
CO N
1.5
1.75
2
2.25
IA
TA = -40C TA = 25C
0.75 1 1.25
VIN (V)
VIN (V)
Line Regulation -- PWM Mode (VOUT = 3.3V)
TA = 85C
1.5
1.75
2
2.25
2.5
2.75
3
VIN (V)
VIN (V)
Line Regulation -- PSAVE Mode (VOUT = 4.0V)
4.05 R1 = 1.37M, R2 = 590k, L = 4.7H, IOUT = 4mA 4.05
Line Regulation -- PWM Mode (VOUT = 4.0V)
R1 = 1.37M, R2 = 590k, L = 4.7H, IOUT = 75mA
TA = 85C
4 4
TA = -40C
VOUT (V) VOUT (V)
TA = 25C
3.95
3.95
TA = -40C
3.9
3.9
TA = 85C
TA = 25C
3.85 0.5
1
1.5
2
2.5
3
3.5
4
3.85 0.5
1
1.5
2
2.5
3
3.5
4
VIN (V)
VIN (V)
PRELIMINARY
7
SC120
Typical Characteristics (continued)
Temperature Reg. -- PSAVE Mode (VOUT = 1.8V)
1.85 1.84 1.83 R1 = 499k, R2 = 1M, L = 4.7H, IOUT = 4mA 1.85
Temperature Reg. -- PWM Mode (VOUT = 1.8V)
R1 = 499k, R2 = 1M, L = 4.7H, IOUT = 45mA
VIN = 1.5V
1.84 1.83
VIN = 0.7V
1.82 1.82
VOUT (V)
1.81 1.8 1.79 1.78 1.77 -50
VIN = 1.1V
VOUT (V)
VIN = 1.5V
1.81 1.8 1.79 1.78
VIN = 1.1V VIN = 0.7V
-25
0
25
50
o
75
100
-25
L
0
1.77 -50
25
50
o
75
100
Temperature Reg. -- PSAVE Mode (VOUT = 3.3V)
3.34 3.32 3.3 FB grounded, L = 4.7H, IOUT = 4mA 3.34 3.32 3.3
Temperature Reg. -- PWM Mode (VOUT = 3.3V)
VIN = 3.0V VIN = 1.0V VIN = 2.0V
VOUT (V)
3.28 3.26 3.24 3.22 3.2 -50
NT DE
VOUT (V)
75 100 3.28 3.26 3.24 3.22 3.2 -50
FB grounded, L = 4.7H, IOUT = 75mA
IA
-25 -25
Junction Temperature ( C)
Junction Temperature ( C)
VIN = 3.0V
VIN = 2.0V
FI
-25 0
VIN = 1.0V
CO N
25 50
o
0
25
50
o
75
100
Junction Temperature ( C)
Junction Temperature ( C)
Temperature Reg. -- PSAVE Mode (VOUT = 4.0V)
4.05 R1 = 1.37M, R2 = 590k, L = 4.7H, IOUT = 4mA 4.05
Temperature Reg. -- PWM Mode (VOUT = 4.0V)
R1 = 1.37M, R2 = 590k, L = 4.7H, IOUT = 75mA
VIN = 3.0V
4 4
VIN = 2.0V
VOUT (V)
VIN = 3.0V
VIN = 1.0V
3.95
VOUT (V)
3.95
VIN = 2.0V
3.9
3.9
VIN = 1.0V
3.85 -50
-25
0
25
50
o
75
100
3.85 -50
0
25
50
o
75
100
Junction Temperature ( C)
Junction Temperature ( C)
PRELIMINARY
8
SC120
Typical Characteristics (continued)
Startup Max. Load Current vs. VIN (VOUT = 1.8V)
50 R1 = 499k, R2 = 1M
Startup Min. Load Resistance vs. VIN (VOUT = 1.8V)
160 140 R1 = 499k, R2 = 1M
40 120
Equivalent R () LOAD
TA = 25C TA = -40C
IOUT (mA)
30
100 80 60
TA = 85C
20
TA = 85C
40 20
10
TA = -40C TA = 25C
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
0.7
0.8
L
0.9 1 1 1.25 1.5 1.5 2
0
0
1.1
1.2
1.3
1.4
1.5
Startup Max. Load Current vs. VIN (VOUT = 3.3V)
90 80 70 60 FB grounded
Startup Min. Load Resistance vs. VIN (VOUT = 3.3V)
Equivalent R () LOAD
IOUT (mA)
50 40 30 20 10
TA = 85C
DE FI
2.5 2.75 3
NT
160 140 120 100 FB grounded
80 60
TA = -40C
40 20 0 0.5
TA = 25C
0 0.5 0.75 1 1.25
CO N
1.5
1.75
2
2.25
IA
TA = 25C TA = 85C
0.75
VIN (V)
VIN (V)
TA = -40C
1.75
2
2.25
2.5
2.75
3
VIN (V)
VIN (V)
Startup Max. Load Current vs. VIN (VOUT = 4.0V)
100 R1 = 1.37M, R2 = 590k
Startup Min. Load Resistance vs. VIN (VOUT = 4.0V)
160 140 R1 = 1.37M, R2 = 590k
80
TA = 25C
TA = 85C
Equivalent R () LOAD
60
120 100 80 60 40
IOUT (mA)
TA = -40C
40
TA = 25C
20
TA = -40C
TA = 85C
20
0 0.5
1
1.5
2
2.5
3
3.5
4
0 0.5
1
2.5
3
3.5
4
VIN (V)
VIN (V)
PRELIMINARY
9
SC120
Typical Characteristics (continued)
IOUT (max) vs. VIN
0.6 VOUT = 3.3V
0.9
Minimum Start-up Voltage vs. Temperature
VOUT = 3.3V, IOUT = 1mA
0.5
Maximum Output Current (A)
0.85
Startup Voltage (V)
0.4 T = 85C 0.3
T = 25C
0.8
0.75
T = -40C 0.2
0.7
0.1
0.65
0.9
1.1
1.3
1.5 1.7 Input Voltage (V)
1.9
2.1
2.3
L
0
0 0.7
2.5
0.6 -40
-20
20 40 Temperature (C)
60
80
100
Load Transient (PSAVE to PWM)
VOUT = 3.3V, VIN = 1.2V, TA = 25C
IOUT = 5mA to 100mA (50mA/div)
DE FI CO N
Time = (100s/div)
VOUT (100mV/div) AC Coupled
NT
IOUT = 40mA to 140mA (50mA/div) VOUT (100mV/div) AC Coupled VOUT ripple (10mV/div) IL (100mA/div) VLX (5V/div)
IA
PRELIMINARY
Load Transient (PWM to PWM)
VOUT = 3.3V, VIN = 1.5V, TA =25C
Time = (100s/div)
PSAVE Operation
VOUT = 3.3V, VIN = 1.5V, IOUT = 20mA VOUT ripple (50mV/div)
PWM Operation
VOUT = 3.3V, VIN = 1.5V, IOUT = 50mA
IL (100mA/div)
VLX (5V/div) Time = (10s/div)
Time = (400ns/div)
10
SC120
Pin Descriptions
Pin #
1 2 3 4 5
Pin Name
LX GND IN EN FB
Pin Function
Switching node -- connect an inductor from the input supply to this pin. Signal and power ground. Battery input and damping switch connection. Enable digital control input -- active high. Feedback input -- connect to GND for preset 3.3V output. A voltage divider is connected from OUT to GND to adjust output from 1.8V to 4.0V. Output voltage supply pin -- requires an external 10F bypass capacitor (while under VOUT bias) for normal operation. Thermal Pad is for heat sinking purposes -- connect to ground using multiple vias -- not connected internally.
6
OUT Thermal Pad
CO N
PRELIMINARY
FI
DE
NT
IA
T
L
11
SC120
Block Diagram
IN
3
VOUT Comp.
+ + 1.7 V +
6
OUT
EN
4
Start-up Oscillator
PLIM Amp.
IA
L NT
Oscillator and Slope Generator Slope Comp. Gate Drive and Logic Control Bulk Bias
1
LX
DE
-
PWM Comp. +
PWM Control + NLIM Amplifier + Current Amplifier
CO N
+
FB
5
Output Voltage Selection Logic
FI
Error Amp.
+ VREF - 1.2 V
2
GND
PRELIMINARY
12
SC120
Applications Information
Detailed Description
The SC120 is a synchronous step-up Pulse Width Modulated (PWM) DC-DC converter utilizing a 1.2MHz fixed frequency current mode architecture. It is designed to provide output voltages in the range 1.8V to 4.0V from an input voltage as low as 0.7V, with a (output unloaded) start up input voltage of 0.85V. The device operates in two modes: PWM and automatic PSAVE mode. In PWM operation, the devices uses pulse width modulation control to regulate the output under moderate to heavy load conditions. It switches to PSAVE mode when lightly loaded. Quiescent current consumption is as little as 50A, into the OUT pin, when in PSAVE mode. The regulator control circuitry is shown in the Block Diagram. It is comprised of a programmable feedback controller, an internal 1.2MHz oscillator, an nchannel Field Effect Transistor (FET) between the LX and GND pins, and a p-channel FET between the LX and OUT pins. The current flowing through both FETs is monitored and limited as required for startup, PWM operation, and PSAVE operation. An external inductor must be connected between the IN pin and the LX pin. When the n-channel FET is turned on, the LX pin is internally grounded, connecting the inductor between IN and GND. This is called the on-state. During the on-state, inductor current flows to ground and is increasing. When the n-channel FET is turned off and the p-channel FET is turned on (known as the off-state), the inductor is then connected between IN and OUT. The (now decreasing) inductor current flows from the input to the output, boosting the output voltage above the input voltage.
LX OUT R1 FB R2 CFB (optional)
Figure 1 -- Output Voltage Feedback Circuit The values of the resistors in the voltage divider network are chosen to satisfy the equation:
VOUT
Output Voltage Selection
The SC120 output voltage can be programmed to an internally preset value or it can be programmed with external resistors. The output is internally programmed to 3.3V when the FB pin is connected to GND. Any output voltage in the range 1.8V to 4.0V can be programmed with a resistor voltage divider between OUT and the FB pin as shown in Figure 1.
CO N
FI
DE
PRELIMINARY
NT
The value of R2 should be 590k or larger for stability. Otherwise, the values of R1 and R2 can be as large as desired to achieve low quiescent current.
PWM Operation
The PWM cycle runs at a fixed frequency (fosc = 1.2MHz), with a variable duty cycle (D). PWM operation continually draws current from the input supply (except for discontinuous mode, described below). During the on-state, of the PWM cycle, the n-channel FET is turned on, grounding the inductor at the LX pin. This causes the current flowing from the input supply through the inductor to ground to ramp up. During the off-state, the n-channel FET is turned off and the p-channel FET (synchronous rectifier) is turned on. This causes the inductor current to flow from the input supply through the inductor into the output capacitor and load, boosting the output voltage above the input voltage. The cycle then repeats to reenergize the inductor. Ideally, the steady state (constant load) duty cycle is determined by D = 1 - (VIN/VOUT ), but must be greater in practice to overcome dissipative losses. The SC120 PWM controller constrains the value of D such that 0.15 < D < 0.9, (approximately). The average inductor current during the off-state multiplied by (1-D) is equal to the average load current. The inductor current is alternately ramping up (on-state) and down (off-state) at a rate and amplitude determined by
13
IA
VFB 1 R1 R2
L
SC120
Applications Information (continued)
the inductance value, the input voltage, and the on-time (DxT). Therefore, the instantaneous inductor current will be alternately larger and smaller than the average. If the average output current is sufficiently small, the minimum inductor current can reach zero during the off-state. If the energy stored in the inductor is depleted (if the inductor current decreases to zero) during the off-state, both FETs turn off for the remainder of the off-state. If this discontinuous mode (DM) operation persists, the SC120 transitions to PSAVE operation. PSAVE mode requires fewer circuit resources than PWM mode. All unused circuitry is disabled to reduce quiescent power dissipation. In PSAVE mode, the OUT pin voltage monitoring circuit remains active and the output voltage error amplifier operates as a comparator. PSAVE regulation is shown in Figure 2. When VOUT < 1.008xVREG, where VREG is the programmed output voltage, a burst of fixed-period switching occurs to boost the output voltage. The n-channel FET turns on (on-state) until the inductor current rises to approximately 240mA. Then the n-channel FET turns off and the p-channel FET turns on to transfer the inductor energy to the output capacitor and load for the duration of the off-state. This cycle repeats until VOUT > 1.018xVREG, at which point bot FETs are turned off. The output capacitor then discharges into the load until VOUT < 1.008xVREG, and the burst cycle repeats.
PSAVE Operation
At light loads, the SC120 will operate in PSAVE mode. PSAVE mode ensures proper regulation when VIN is too close to VOUT while the output load is too small to keep the duty cycle above its minimum value. At very low output load, PSAVE mode will operate more efficiently than PWM mode. PSAVE operation is triggered by 256 consecutive cycles of DM operation in PWM mode, when the output of the PLIM amplifier falls to 0V during the off-state due to low load current.
FI
BURST OFF
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Higher Load Applied Time
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BURST
When the output current increases above a predetermined level, either of two PSAVE exit conditions will force the resumption of PWM operation. The first PSAVE exit criterion is shown in Figure 2. If the PSAVE burst cycle cannot provide sufficient current to the output, the output voltage will decrease during the burst. If
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PSAVE exit due to output decay
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PSAVE Mode at Moderate Load
OFF
BURST
+1.8%
+0.8%
VOUT
Prog'd Voltage
-2%
Inductor Current
240mA
0A
Figure 2 -- PSAVE Operation With Exit to PWM Due To Output Voltage Decay
PRELIMINARY
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PWM Mode at High Load
PWM Mode
14
SC120
Applications Information (continued)
PSAVE Mode at Moderate Load
BURST OFF (> 5s)
Higher Load Applied
BURST
PSAVE exit due to off-time reduction
OFF (< 5s)
PWM Mode at High Load
PWM Mode
+1.8%
+0.8%
VOUT
Prog'd Voltage
-2%
Inductor Current
240mA
0A Time
Figure 3 -- PSAVE Operation With Exit to PWM Due To Off-time < 5s VOUT < 0.98 x VREG, PWM operation will resume. The second PSAVE exit criterion, illustrated in Figure 3, depends on the rate of discharge of the output capacitor between PSAVE bursts. If the time between bursts is less than 5s, then PWM operation resumes. The output capacitance value will affect the second criterion, but not the first. Reducing the output capacitor will reduce the output load at which PSAVE mode exits to PWM mode. phenomenon is advantageous. Reverting to PWM operation with high VIN can result in VOUT rising above VREG, due to the PWM minimum duty cycle. PSAVE operation avoids this voltage rise because of its voltage-threshold on/off control. If the load remains low enough to remain in PSAVE, VIN can approach and even slightly exceed VOUT. To initally enter PSAVE mode, the initial startup load must be small enough to cause discontinuous mode PWM operation. This PSAVE mode startup load upper limit can be increased if needed by reducing the inductance (refer to the section Inductor Selection). Sufficiently large output capacitance will prevent PSAVE exit due to the second exit criterion (Figure 3). PSAVE VOUT ripple may increase due to parasitic capacitance on the external FB pin network. If using external feedback programming, it is prudent to add a small capacitor between OUT and FB to the circuit board layout. When operating the SC120 in the final configuration in PSAVE, observe the amplitude of PSAVE ripple. If the ripple exceeds 50mV for the expected range of input voltage, a small-value capacitor should be tried. Capacitance on the order of a few picofarads is often sufficient to bring the ripple amplitude to approximately 50mV.
Within each on/off cycle of a PSAVE burst, the rate of decrease of the inductor current during the off-state is proportional to (VOUT - VIN). If VIN is sufficiently close to VOUT, the decrease in current during the off-state may not overcome the increase in current during the minimum on-time of the on-state, approximately 100ns. This can result in the peak inductor current rising above the PSAVE mode n-channel FET current limit. (Normally, when the n-channel FET current limit is reached, the on-state ends immediately and the off-state begins. This sets the duty cycle on a cycle-by-cycle basis.) This inductor current rise accumulates with each successive cycle in the burst. The result is that the output load current that can be supported in PSAVE under this high VIN condition will be greater than occurs if the 240mA current limit can be enforced. Therefore the PSAVE exit load due to the first exit criterion (Figure 2) can increase significantly. This
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PRELIMINARY
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SC120
Applications Information (continued)
The Enable Pin
The EN pin is a high impedance logical input that can be used to enable or disable the SC120 under processor control. VEN < 0.2V will disable regulation, set the LX pin in a high-impedance state (turn off both FET switches), and turn on an active discharge device to discharge the output capacitor via the OUT pin. VEN > 0.85V will enable the output. The startup sequence from the EN pin is identical to the startup sequence from the application of input power. Note that startup with a regulated active load is not the same as startup with a resistive load. The resistive load output current increases proportionately as the output voltage rises until it reaches programmed VOUT/RLOAD, while a regulated active load presents a constant load as the output voltage rises from 0V to programmed VOUT. Note also that if the load applied to the output exceeds an applicable VOUT-dependent startup current limit or duty cycle limit, the criterion to advance to the next startup stage may not be achieved. In this situation startup may pause at a reduced output voltage until the load is reduced further.
To begin, the p-channel FET between the LX and OUT pins turns on with its current limited to approximately 150mA, the short-circuit output current. When VOUT approaches VIN (but is still below 1.7V), the n-channel current limit is set to 350mA (the p-channel limit is disabled), the internal oscillator turns on (approximately 200kHz), and a fixed 75% duty cycle PWM operation begins. (See the section PWM Operation.) When the output voltage exceeds 1.7V, normal fixed frequency variable duty cycle PWM operation begins, with the n-channel FET's current limited to 350mA to prevent excessive output voltage overshoot. If the n-channel FET current limit is exceeded, the on-state ends immediately and the off-state begins, overriding the output voltage regulation controller. This reduces the duty cycle on a cycle-by-cycle basis. When VOUT is within 2% of the programmed regulation voltage, the n-channel FET current limit is raised to 1.2A.
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Once variable duty cycle PWM operation is initiated, the output becomes independent of VIN and output regulation can be maintained for VIN as low as 0.7V, subject to the maximum duty cycle and peak current limits. The duty cycle must remain between 15% and 90% for the device to operate within specification.
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PRELIMINARY
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The SC120 permits power up at input voltages from 0.85V to 3.8V. Startup current limiting of the internal switching n-channel and p-channel FET power devices protects them from damage in the event of a short between OUT and GND. As the output voltage rises, progressively lessrestrictive current limits are applied. This protection unavoidably prevents startup into an excessive load.
Output Overload and Recovery
When in PSAVE operation, an increasing load will eventually satisfy one of the PSAVE exit criteria and regulation will revert to PWM operation. As previously noted, the PWM steady state duty cycle is determined by D = 1 - (VIN/VOUT ), but must be somewhat greater in practice to overcome dissipative losses. As the output load increases, the dissipative losses also increase. The PWM controller must increase the duty cycle to compensate. Eventually, one of two overload conditions will occur, determined by VIN, VOUT, and the overall dissipative losses due to the output load current. Either the maximum duty cycle of 90% will be reached or the n-channel FET 1.2A (nominal) peak current limit will be reached, which effectively limits the duty cycle to a lower value. Above that load, the output voltage will decrease rapidly and in reverse order the startup current limits will be invoked as the output voltage falls through its various voltage thresholds. How far the output voltage drops depends on the load V-I characteristics. A reduction in input voltage, such as due to a discharging battery, will lower the load current at which overload occurs. Lower input voltage increases the duty cycle required to produce a given output voltage. And lower input voltage also increases the input current to maintain the input power, which increases dissipative losses and further increases the required duty cycle. Therefore an increase in load current or a decrease in input voltage can result in output overload. Once an overload has occurred, the load must be decreased to permit recovery. The conditions required for
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Regulator Startup, Short Circuit Protection, and Current Limits
SC120
Applications Information (continued)
overload recovery are identical to those required for successful initial startup. The governing equations for inductor selection are the following. Equating input power to output power, noting that input current equals inductor current, and averaging over a full PWM switching cycle,
IL 1 VOUT IOUT VIN
Anti-ringing Circuitry
In PWM operation, the n-channel and p-channel FETs are simultaneously turned off when the inductor current reaches zero. They remain off for the zero-inductorcurrent portion of the off-state. Note that discontinuous mode is a marginal-load condition, which if persistent will trigger a transition to PSAVE operation. When both FET switches are simultaneously turned off, an internal switch between the IN and LX pins is closed, providing a moderate resistance path across the inductor to dampen the oscillations at the LX pin. This effectively reduces EMI that can develop from the resonant circuit formed by the inductor and the drain capacitance at LX. The anti-ringing circuitry is disabled between PSAVE bursts.
avg
where is efficiency. IL is the inductor (and thus the input) peak-to-peak current. Neglecting the n-channel FET RDS-ON and the inductor DCR, for duty cycle D, and with T = 1/fosc,
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DT 0
IL
on
VIN dt
Component Selection
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NT
IL
off
This is the change in IL during the on-state. During the off-state, again neglecting the p-channel FET RDS-ON and the inductor DCR,
1 L
T DT
L
T
2
VIN D T L
Inductor Selection The inductance value primarily affects the amplitude of inductor current ripple (I L). Reducing inductance increases I L. This raises the inductor peak current, IL-max = IL-avg + IL/2, where IL-avg is the inductor current averaged over a full on/off cycle. I L-max is subject to the n-channel FET current limit ILIM(N), therefore reducing the inductance may lower the output overload current threshold. Increasing IL also lowers the inductor minimum current, IL-min = IL-avg - IL/2, thus raising the PSAVE entry load current threshold. This is the output load below which IL-min = 0, the boundary between continuous mode and discontinuous mode PWM regulation, which signals the SC120 controller to switch to PSAVE operation. In the extreme case of VIN approaching VOUT, smaller inductance can also reduce the PSAVE inductor burst-envelope current ripple and voltage ripple.
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The SC120 provides optimum performance when a 4.7H inductor is used with a 10F output capacitor. Different component values can be used to modify PSAVE exit or entry loads, modify output voltage ripple in PWM mode, improve transient response, or to reduce component size or cost.
VIN VOUT dt
VIN VOUT L
T
1D
FI
Note that this is a negative quantity, since VOUT > VIN and 0 < D < 1. For a constant load in steady-state, the inductor current must satisfy IL-on + IL-off = 0. Substituting the two expressions and solving for D, obtain D = 1 - VIN/VOUT. Using this expression, and the positive valued expression IL = IL-on for current ripple amplitude, obtain expanded expression for IL-max and IL-min.
IL VOUT IOUT VIN VIN 2 L VOUT VOUT VIN
max,min
If the value of IOUT decreases until IL-min = 0, which is the boundary of continuous and discontinuous PWM operation, the SC120 will transition from PWM operation to PSAVE operation. Define this value of IOUT as IPSAVE-entry. Setting the expression for IL-min to 0 and solving,
IPSAVE
entry
T VIN 2 L VOUT
VOUT VIN
PRELIMINARY
17
SC120
Applications Information (continued)
The programmed value of VOUT is constant. IPSAVE-entry is a polynomial function of VIN. Equating dIPSAVE-entry/dVIN = 0 and solving for VIN reveals that there is one non-zero extremum of this function, a maximum, at VIN = 2/3 VOUT. Applying this value of VIN,
IPSAVE T
entry max
Table 1 -- Recommended Inductors
Manufacturer/ Part # Murata LQH43MN4R7K03L Value (H) 4.7 DCR () 0.4 Rated Current (mA) 500 Tolerance (%) 10 Dimensions LxWxH (mm) 4.5 x 3.2 x 2.6
L
2 VOUT 27
These calculations include the parameter , efficiency. Efficiency varies with VIN, IOUT, and temperature. Estimate using the plots provided in this datasheet, or from experimental data, at the operating condition of interest when computing the effect of a new inductor value on PSAVE entry and I-limit margin. Any chosen inductor should have low DCR, compared to the RDS-ON of the FET switches, to maintain efficiency, though for DCR << RDS-ON, further reduction in DCR will provide diminishing benefit. The inductor ISAT value should exceed the expected IL-max. The inductor self-resonant frequency should exceed 5xfosc. Any inductor with these properties should provide satisfactory performance. Table 1 lists the manufacturers of recommended inductor options.
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The inductor selection should also consider the n-channel FET current limit for the expected range of input voltage and output load current. The largest IL-avg will occur at the expected smallest VIN and largest IOUT. Determine the largest allowable IL, based on the largest expected IL-avg, the minimum n-channel FET current limit, and the inductor tolerance. Ensure that in the worst case, IL-avg + IL/2 < ILIM(N).
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Manufacturer/ Part Number Murata GRM21BR60J226ME39B
The value of the inductor determines the PSAVE entry output load current. Evaluate IPSAVE-entry at the smallest and largest expected values of VIN. If the input range includes VIN = 2/3 VOUT, also determine IPSAVE-entry-max. If the largest VIN exceeds approximately 90% of VOUT, then instead evaluate PSAVE entry at VIN = 0.9VOUT. Since PSAVE exit will require an unusually high output load current at high VIN. This was explained in a previous section, therefore PSAVE entry under this condition may not be relevant.
Capacitor Selection Input and output capacitors must be chosen carefully to ensure that they are of the correct value and rating. The output capacitor requires a minimum capacitance value of 10F at the programmed output voltage to ensure stability over the full operating range. This must be considered when choosing small package size capacitors as the DC bias must be included in their derating to ensure this required value. For example, a 10F 0805 capacitor may provide sufficient capacitance at low output voltages but may be too low at higher output voltages. Therefore, a higher capacitance value may be required to provide the minimum of 10F at these higher output voltages. Additional output capacitance may be required for VIN close to VOUT to reduce ripple in PSAVE mode and to ensure stability in PWM mode, especially at higher output load currents. Low ESR capacitors such as X5R or X7R type ceramic capacitors are recommended for input bypassing and output filtering. Low-ESR tantalum capacitors are not recommended due to possible reduction in capacitance seen at the switching frequency of the SC120. Ceramic capacitors of type Y5V are not recommended as their temperature coefficients make them unsuitable for this application. Table 2 lists the manufacturer of the recommended capacitor. Table 2 -- Recommended Capacitor
Value (F) 22 Rated Voltage (VDC) 6.3 Type Case Size 0805
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X5R
PRELIMINARY
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SC120
Applications Information (continued)
PCB Layout Considerations
Poor layout can degrade the performance of the DC-DC converter and can contribute to EMI problems, ground bounce, and resistive voltage losses. Poor regulation and instability can result. A few simple design rules can be implemented to ensure good layout:
* *
*
Place the inductor and filter capacitors as close to the device as possible and use short wide traces between the power components.
*
Route the output voltage feedback path away from the inductor and LX node to minimize noise and magnetic interference. Maximize ground metal on the component side to improve the return connection and thermal dissipation. Separation between the LX node and GND should be maintained to avoid coupling capacitance between the LX node and the ground plane. Use a ground plane with several vias connecting to the component side ground to further reduce noise interference on sensitive circuit nodes.
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LX
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COUT
VOUT
OUT
6.7mm
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GND IN
SC120
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R1
FB EN
L
LX
5.2mm
(2
nd
layer)
R2
VIN
CIN
PRELIMINARY
19
SC120
Outline Drawing -- MLPD-UT-6 1.5x2
DIMENSIONS DIM A A1 A2 b D D1 E E1 e L N aaa bbb INCHES MIN .020 .000 .007 .055 .035 .075 .026 NOM (.006) .010 .059 MAX .024 .002 .012 .063 .055 .083 .035 MILLIMETERS MIN 0.50 0.00 0.18 1.40 0.90 1.90 0.65 NOM (.152) 0.25 1.50 MAX 0.60 0.05 0.30 1.60 1.40 2.10 0.90
A
D
B
E PIN 1 INDICATOR (LASER MARK)
A2 A aaa C C A1 D1 1 LxN 2 SEATING PLANE
E1
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N e NOTES: 1.
bxN
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.
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bbb CAB
PRELIMINARY
NT
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.079 .031 .020 BSC .012 .014 .016 6 .003 .004
2.00 0.80 0.50 BSC 0.30 0.35 0.40 6 0.08 0.10
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20
SC120
Land Pattern -- MLPD-UT-6 1.5x2
H R DIMENSIONS DIM C Z (C) K G G H K P R Y X Y P X Z INCHES (.077) .047 .051 .031 .020 .006 .012 .030 MILLIMETERS (1.95) 1.20 1.30 0.80 0.50 0.15 0.30 0.75 2.70
NOTES: 1. 2.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. COMPANY'S MANUFACTURING GUIDELINES ARE MET.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com
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PRELIMINARY
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SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
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